Hardware-design — Topic

📑 arXiv 3d ago

COEVO: Co-Evolutionary Framework for Joint Functional Correctness and PPA Optimization in LLM-Based RTL Generation

COEVO unifies functional correctness and PPA (power, performance, area) optimization for LLM-generated RTL code in a single co-evolutionary loop, replacing sequential pipelines that discard partially correct but architecturally promising candidates. Existing methods decouple correctness from PPA and reduce multi-objective optimization to scalar fitness, obscuring trade-offs. COEVO treats correctness as continuous rather than binary, enabling simultaneous optimization of both objectives.

Code Gen Optimization Hardware-design

📑 arXiv 3d ago

Dr.~RTL: Autonomous Agentic RTL Optimization through Tool-Grounded Self-Improvement

Agentic framework for RTL timing optimization using LLMs with tool-grounded self-improvement and reusable optimization skills. Evaluated on realistic RTL designs with industrial-grade tools rather than manually degraded toy examples. Moves beyond coarse design-level feedback to fine-grained optimization through learned skills.

Agents Code Gen Hardware-design

COEVO: Co-Evolutionary Framework for Joint Functional Correctness and PPA Optimization in LLM-Based RTL Generation ↗

Dr.~RTL: Autonomous Agentic RTL Optimization through Tool-Grounded Self-Improvement ↗

COEVO: Co-Evolutionary Framework for Joint Functional Correctness and PPA Optimization in LLM-Based RTL Generation

Dr.~RTL: Autonomous Agentic RTL Optimization through Tool-Grounded Self-Improvement